package jdos.hardware;

public class VGA_seq {
    static private IoHandler.IO_ReadHandler read_p3c4 = new IoHandler.IO_ReadHandler() {
        public /*Bitu*/int call(/*Bitu*/int port, /*Bitu*/int iolen) {
            return VGA.vga.seq.index;
        }
    };

    private static IoHandler.IO_WriteHandler write_p3c4 = new IoHandler.IO_WriteHandler() {
        public void call(/*Bitu*/int port, /*Bitu*/int val, /*Bitu*/int iolen) {
            VGA.vga.seq.index=(short)val;
        }
    };

    private static IoHandler.IO_WriteHandler write_p3c5 = new IoHandler.IO_WriteHandler() {
        public void call(/*Bitu*/int port, /*Bitu*/int val, /*Bitu*/int iolen) {
        //	LOG_MSG("SEQ WRITE reg %X val %X",VGA.vga.seq.index),val);
            switch(VGA.vga.seq.index) {
            case 2:		/* Map Mask */
                VGA.vga.seq.map_mask=(byte)(val & 0x0F);
            default:
                break;
            }
        }
    };

    static private IoHandler.IO_ReadHandler read_p3c5 = new IoHandler.IO_ReadHandler() {
        public /*Bitu*/int call(/*Bitu*/int port, /*Bitu*/int iolen) {
        //	LOG_MSG("VGA:SEQ:Read from index %2X",VGA.vga.seq.index));
            switch(VGA.vga.seq.index) {
            case 2:			/* Map Mask */
                return VGA.vga.seq.map_mask & 0xFF;
            default:
                break;
            }
            return 0;
        }
    };
    
    public static void VGA_SetupSEQ() {
        //if (Dosbox.IS_EGAVGA_ARCH()) {
        IoHandler.IO_RegisterWriteHandler(0x3c4,write_p3c4,IoHandler.IO_MB);
        IoHandler.IO_RegisterWriteHandler(0x3c5,write_p3c5,IoHandler.IO_MB);
        //if (Dosbox.IS_VGA_ARCH()) {
        IoHandler.IO_RegisterReadHandler(0x3c4,read_p3c4,IoHandler.IO_MB);
        IoHandler.IO_RegisterReadHandler(0x3c5,read_p3c5,IoHandler.IO_MB);
        //}
        //}
    }

    
}
